64-1383-97 [Discontinued]Nexperia 74LV08PW,112, Quad 2-Input AND Logic Gate, 14-Pin TSSOP 74LV08PW,112
Features
- 74LV Family, Nexperia. Low-Voltage CMOS logic Operating Voltage: 1.0 to 5.5 Compatibility: Input LVTTL/TTL, Output LVCMOS
Spec
- Quantity:1set(96pieces)
- Logic Function:AND
- Mounting Type:Surface Mount
- Number of Elements:4
- Number of Inputs per Gate:2
- Schmitt Trigger Input:No
- Package Type:TSSOP
- Pin Count:14
- Logic Family:LV
- Input Type:CMOS
- Maximum Operating Supply Voltage:5.5 V
- Maximum High Level Output Current:-12mA
- Maximum Propagation Delay Time @ Maximum CL:33 ns @ 15 pF
- Minimum Operating Supply Voltage:1 V
- Maximum Low Level Output Current:12mA
- Minimum Operating Temperature:-40 °C
- CODE No.:146-0423
| Order No. | 64-1383-97 | |
|---|---|---|
| Model No. | 74LV08PW,112 | |
| Standard price |
JPY: 6,040
USD: 37.58
Excange rate 1USD= 160.72JPY
Valid price in Japan |
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| Quantity | 1set(96pieces) | |
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| Stock in Japan | - | |
![[Discontinued]Nexperia 74LV08PW,112, Quad 2-Input AND Logic Gate, 14-Pin TSSOP 74LV08PW,112](https://aimg.as-1.co.jp/c/64/1383/97/64138397.jpg?v=03790be0f2ba82c1280907a7033cf49dabaaa7c1)