63-8022-16 Nexperia 74LVC2G125DP,125, Dual-Channel Non-Inverting 3-State Buffer, 8-Pin TSSOP 74LVC2G125DP,125
Features
- 74LVC Family Inverters ; Buffers. Low-Voltage CMOS logic Single gate package Operating Voltage: 1.65 to 5.5 V Compatibility: Input LVTTL/TTL, Output LVCMOS
Spec
- Quantity:1set(3000pieces)
- Logic Family:LVC
- Logic Function:Buffer
- Number of Channels:2
- Schmitt Trigger Input:No
- Input Type:Single Ended
- Output Type:3 State
- Polarity:Non-Inverting
- Mounting Type:Surface Mount
- Package Type:TSSOP
- Pin Count:8
- Maximum High Level Output Current:-32mA
- Maximum Low Level Output Current:32mA
- Maximum Propagation Delay Time @ Maximum CL:11.4ns
- Dimensions:3.1 x 3.1 x 0.95mm
- Minimum Operating Temperature:-40 °C
- CODE No.:165-8630
| Order No. | 63-8022-16 | |
|---|---|---|
| Model No. | 74LVC2G125DP,125 | |
| Standard price |
JPY: 150,000
USD: 933.30
Excange rate 1USD= 160.72JPY
Valid price in Japan |
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| Quantity | 1set(3000pieces) | |
| Stock in Japan |
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| Supplier Stock |
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